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CXA2547Q
2-band Electronic Volume For the availability of this product, please contact the sales office.
Description The CXA2547Q is a 2-channel electronic volume IC. A 34-bit serial data input controls the level and characteristics of the output signal. It may be used in car stereos and general audio systems. Features * Loudness * Volume control (from 0 dB to -80 dB, - dB : Fine (1 dB-step) Coarse (8 dB-step) * Balance * Tone control (2-band, 2 dB-step from -15 dB to +15 dB) * Fader 2 dB-step to -20 dB, -25 dB, -35 dB, -45 dB, -60 dB, - dB) * Input and gain selector (4 channels) * Serial data control (DATA, CLK, CE) * Single 8 V power supply * Zero-cross detection circuit (L/R independent operation for the volume block) * Timer * Power-off mute * Countermeasure to the noise of the portable telephone Structure Bipolar silicon monolithic IC 48 pin QFP (Plastic)
Absolute Maximum Ratings (Ta=25 C) * Supply voltage VCC 13 V * Operating temperature Topr -40 to +85 C * Storage temperature Tstg -65 to +150 C * Allowable power dissipation PD 350 mW (Ta=85 C) Recommended Operating Conditions Supply voltage VCC 7 to 12
V
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
--1--
E97Y19B91-TE
CXA2547Q
Block Diagram and Pin Configuration
GAIN134
TCLC11
INAO1
TCLC12
LDHC1
TCHC1
LDLC1
VRIN1
36 GAIN12 37 GAIN11 38 IN14 39 IN13 40 IN12 41 IN11 42 IN21 43
35
34
33
32
31
30
29
28
27
26
TCO1
NC
25 24 FNTO1
LOUD VOLUME 2dB STEP VOLUME 1dB STEP VCTBUFF ZCDET VOL VCTBUFF VCTBUFF LATCH ZCDET SHIFT REGISTER LATCH CONTROL TONE FADER
FDIN1
23 REO1 22 CE 21 CLK 20 DGND 19 GND 18 VCC 17 VCT 16 DATA 15 TIMER 14 REO2 13 FNTO2 12
INPUT SWITCH
INPUT SWITCH
VCTBUFF ZCDET VOL VCTBUFF VCTBUFF
IN22 44 IN23 45 IN24 46 GAIN21 47 GAIN22 48
VOLUME 2dB STEP LOUD LOUD
VOLUME 1dB STEP
NC
TONE
FADER
1
GAIN234
2
LDLC2
3
LDHC2
4
INAO2
5
VRIN2
6
TCHC2
7
NC
8
NC
9
TCLC21
10
11
TCLC22
--2--
FDIN2
TCO2
CXA2547Q
Pin Description Pin No. Symbol I/O resistance Pin voltage Equivalent circuit
VCC
Description
2 35
LDLC2 LDLC1
1.08 k VCT
2 35
Sets loudness low cut-off frequency.
GND VCC
3 34
LDHC2 LDHC1
24.05 k VCT
3
34
Set loudness high cut-off frequency
GND VCC
4 33
INAO2 INAO1
-- VCT
4
33
Input selector output
GND VCC
5 32
VRIN2 VRIN1
10 k VCT
5
32
Volume input
GND VCC
6 31
TCHC2 TCHC1
5k VCT
6
31
Set tone Treble frequency
GND
--3--
CXA2547Q
Pin No. 7 30 8 29
Symbol NC NC
I/O resistance Pin voltage -- --
Equivalent circuit
Description
VCC
9 28
TCLC21 TCLC11
8k VCT
9
28
Sets tone Bass frequency
GND VCC
10 27
TCLC22 TCLC12
8k VCT
10 27
Sets tone Bass frequency
GND VCC
11 26
TCO2 TCO1
-- VCT
11 26
Tone control output
GND
--4--
CXA2547Q
Pin No.
Symbol
I/O resistance Pin voltage
Equivalent circuit
VCC
Description
12 25
FDIN2 FDIN1
24 k VCT
12 25
Fader input
GND VCC
13 24
REO2 REO1
-- VCT
13 24
Rear output
GND VCC
14 23
FNT02 FNT01
-- VCT
14 23
Front output
GND VCC
15
TIMER
~ --
15
Timer constant setting
GND VCC
16
DATA
~ --
124 4k 16
Serial data input
GND
--5--
CXA2547Q
Pin No. 17 18 19 20
Symbol VCT VCC GND DGND
I/O resistance Pin voltage -- VCT -- VCC -- Gnd -- --
Equivalent circuit 1/2 VCC
Description
Power supply input Ground Digital ground
VCC
21
CLK
~ --
124 4k 21
Serial clock input
GND VCC 20k
22
CE
~ 20k --
22
124 4k
Latch enable input Take care to set the low level as the input impedance is low.
GND VCC
1 36 37 38 47 48 39 40 41 42 43 44 45 46
GAIN234 GAIN134 GAIN12 GAIN11 GAIN21 GAIN22 IN14 IN13 IN12 IN11 IN21 IN22 IN23 IN24
1
~ VCT
36 37 38 47 48 GND VCC
External gain setting for input amplifier
50 k VCT
39 40 41 42 43 44 45 46 GND
Signal input
--6--
CXA2547Q
Data Format First Bit D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 D16 D17 D18 D19 D20 D21 D22 D23 D24 D25 D26 D27 D28 D29 D30 D31 D32 D33 D34 D35 D36 NOP NOP ISW LOUD
VRC1
VRF1
VRC2
VRF2
TONE BASS
NOP
TONE TREBLE
FADER
Last Bit
FADER SELECT
--7--
CXA2547Q
ISW Mode IN14/IN24, GAIN134/GAIN234 IN13/IN23, GAIN134/GAIN234 IN12/IN22, GAIN12/GAIN22 IN11/IN21, GAIN11/GAIN21 LOUD Mode ON OFF VRC1/VRC2
Output (dB) 0 -2 -4 -6 -8 -10 -12 -14 -16 -18 -20 -22 -24 -26 -28 -30 -32 -34 -36 -38 -40 -42 -44 -46 -48 -50 -52 -54 -56 -58 -60 -62 -64 -66 -68 -70 -72 -74 -76 -78 -80 - D6/D13 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 D7/D14 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 D8/D15 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 0 0 0 0 1 0 D9/D16 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 0 0 1 1 0 0 -- -- D10/D17 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 0 1 0 1 0 1 0 -- -- D11/D18 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 -- -- -- -- -- -- -- -- -- --
D3 1 1 0 0
D4 1 0 1 0
D5 1 0
--8--
CXA2547Q
VRF1/VRF2 Output (dB) 0 -1 D12/D19 1 0
BASS/TREBLE Output (dB) 15 12 10 8 6 4 2 0 D20/D28 1 1 1 1 0 0 0 0 D21/D29 1 1 0 0 1 1 0 0 D22/D30 1 0 1 0 1 0 1 0
BOOST/CUT Mode BOOST CUT D23/D31 1 0
FADER Output (dB) - -60 -45 -30 -25 -20 -18 -16 -14 -12 -10 -8 -6 -4 -2 0 D32 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 D33 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 D34 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 D35 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0
--9--
CXA2547Q
FADER SELECT Mode FRONT REAR D36 1 0
RESET Reset is performed automatically when power is first supplied to the IC; there is no reset pin. The following table shows the respective statuses of various settings after a reset has been performed. Mode INPUT VRC1 VRF1 VRC2 VRF2 LOUD TONE BASS TONE MID TONE TREBLE FADER Set value 1 - dB -1 dB - dB -1 dB OFF 0 dB 0 dB 0 dB 0 dB, REAR
Set all the transfer data to "0" for D24, D25, D26 and D27.
--10--
CXA2547Q
Timing Chart
CE
DATA
D1
D2
D34
D35
D36
Invalid
D1
D2
CLK t1 t1 0.5s t2 0.5s tck 1.0s tsu 0.5s th 0.5s tck tsu th t2 tL
tL tT+0.5s (tT is the maximum value for the timer operation time)
D1 for the next data transfer to the CXA2547 is shifted at this clock rise.
CE tce tce 4.0s
Timer Waiting Period Setting Chart (VCC=7 to 12 V, operating temperature=-40 C to 85 C) TIMER pin capacitance C C=100 pF C=0.001 F C=0.01 F C=0.1 F C=1 F C=10 F Waiting period Min. Typ. Max. 3 s 5 s 9 s 30 s 50 s 90 s 300 s 500 s 900 s 3 ms 5 ms 9 ms 30 ms 50 ms 90 ms 300 ms 500 ms 900 ms
--11--
CXA2547Q
Electrical Characteristics VCC=8 V, Ta=25 C, input=0 dB unless otherwise specified Item Current consumption Total harmonic distortion Output noise voltage Max. output voltage Separation Max. attenuation factor Loudness LOW boost Loudness HIGH boost Max. Bass boost gain Max. Bass cut gain Max. Treble boost gain Max. Treble cut gain Input voltage HIGH Input voltage LOW Input voltage range Symbol ICC THD Vn Vom CS ATTm Glb Glh Gbb Gbc Gtb Gtc Vsh Vsl Vin Conditions No signal 1 kHz, 5 dBm output Short-circuit at input, A weight 1 kHz 1 kHz 100 Hz, VRC=-32 dB 10 kHz, VRC=-32 dB Min. -- -- -- 8 72 85 13 5 13 13 13 13 3 0 1 Typ. 25 0.004 8 -- 90 90 15 6 15 15 15 15 -- -- -- Max. 35 0.01 10 -- -- -- 17 7 17 17 17 17 6 1.5 VCC-1 Unit mA % Vrms dBm
dB
DATA, CLK, CE DATA, CLK, CE IN11 to 14 The IC is not IN21 to 24 destroyed or VRIN1, 2 does not operate FDIN1, 2 abnormally.
V
--12--
Electrical Characteristics Measurement Circuit
C15
10
A
S2
C8 0.0027
10k C2 0.22
R2 10k R4 10k
R5
C4 820P
36 OPAMP R18 1k R20 1k C21 220p AC CE
35
34
33
32
31
30
29
28
27
26
25
TCO1
LDHC1
TCHC1
GAIN134
TCLC11
TCLC12
GAIN12
LDLC1
INAO1
VRIN1
FDIN1
37
NC
NC
S5_A
10
C18 A 10
S1 R19 1k
B
B
C14
FNTO1 R13 24 10k R12 REO1 23 10k CE 22
39 IN14
AC
V14
V2
A B S13 CLK 21 20 19 DGND GND
V3
B S14
R15 R15 R17 10k 10k 10k
-60dBm V5
38 GAIN11
0.39
C6
V4 AC
40 IN13
5V 0V 5V 0V CLK
AC
V13
A B S12
41
IN12
AC
V12
A B S11
AC
V11
C19
VCC VCT DATA TIMER REO2 17 16 15 14 18 S4
A B S21
43 IN21
AC
V21
44 IN22
AC
VCC 3.5~ 6V VEE 3.5~6V
A B S22
100
V22
45 IN23
AC
V23
A B S24
0.01 C20 R14 B S3 A R8 10k R7 10k
46
IN24
AC
V24
A
47 GAIN21
GAIN22
GAIN234
LDLC2
LDHC2
INAO2
VRIN2
TCHC2
NC
NC
TCLC21
TCLC22
TCO2
FDIN2
48
13
10k FNTO2
10k
1 3
0.22 C3 820P
10 C5
2 6
4
5
7
8
9
10
R5
R1
R3
10k
10k C1
10 C13 C17
C7 0.0027
C15
0.39
AB AC V6
S5_B
10
11
12
V1
--13--
42 IN11
A B S23
DATA
5V 0V
CXA2547Q
Application Circuit
C15
0.39
C18 10 27 26 25
C6
22k
C2 0.22 C4 820P
10 C14 10 30 29 28
2.2k
36
35
34
33
32
C8 0.0027
31
TCO1
LDHC1
TCHC1
GAIN134
TCLC11
TCLC12
GAIN12 REO1 CE 22 21 20 19 18 17 16 DATA TIMER REO2 0.01 15 14 13 FNTO2 R8 10k R7 C20 CLK DGND GND VCC VCT
LDLC1
INAO1
VRIN1
FDIN1
37
NC
NC
38 GAIN11
FNTO1 R13 24 10k R12 23 10k
OUTPUT SIGNAL
39 IN14
40 IN13
TO CPU
41 IN12
42
IN11
44 IN22
45 IN23
46 IN24
47
GAIN21
48
GAIN22
GAIN234
LDLC2
LDHC2
INAO2
VRIN2
TCHC2
NC
NC
TCLC21
2.2k
1 2
10
3 5
C5
4
820P
6
7
8
9
10 10 C13
TCLC22
11 10
TCO2
12
22k
C1
0.22 C3
C7 0.0027
C17
C15
CXA2547Q
Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same.
0.39
FDIN2
10k
C21
10
--14--
C19
INPUT SIGNAL SOURCES
43 IN21
33
TO POWER SUPPLY
CXA2547Q
Description of Operation (1) Input amplifier gain
36 GAIN134 37 GAIN12 Rext 38 GAIN11 33 VCT 39 IN14 40 IN13 41 IN12 42 IN11 Gain=1+ Rint Rext No Rext 0 dB Rint is included in this IC, (22k) Rint INAO1
(2) LOUD The loudness function achieves the necessary frequency response by using a filter as shown below. The resistors are built in this IC so that fL and fH can be set by selecting C1 and C2.
3 LDHC1 4 LDHC2
R2=24.05k
fL=1/ (2C1R1) fH=1/ (2C2R2)
C2 38.8k 13.02k 32 VRIN1 R1=1.08k VCT CXA2547Q fH
5 VRIN2
fL
3 LDLC1
C1 VCT
5 LDLC2
--15--
CXA2547Q
(3) Tone control BASS : LPF
fL=1/ (2C1R1//R2) R1=8k 8k R2=8k CXA2547Q C1 VCT 8k VCT 27 TCLC12 18 TCLC22 VCT fL
TREBLE : HPF
fH=1/ (2C4R5) 10k 10k 10k VCT
fH
10k R5=5k CXA2547Q
C4
3 TCHC11 1 TCHC21
VCT
--16--
CXA2547Q
(4) Zero-cross detector and timer A built-in zero-cross detection circuit is used to detect the zero-cross points of the input signal. When data arrived at the IC, they are executed at the next zero-cross point or when there is no input signal. This is to minimize 'click' noise during the transition of levels. The timer circuit is added to ensure that the data is executed even when a zero-cross point is not detected after a certain period of time from the falling edge of the CE pulse.
Time constant=(0.5/10) x C [s] VCC 10A 0.5V CE
15
CXA2547Q TIMER C
(5) VCT pin The internal circuit of VCT pin has the following structure. Insert a buffer when using the pin as a reference voltage for an external circuit.
VCC
100k VCT 17 100k CXA2574Q GND
(6) Power-off mute When VCC goes below 5 V, the output stage bias of the fader output pins FNTO1, FNTO2, REO1, and REO2 is turned off and the pins go to high impedance. This operation prevents popping noises caused by the output pin potential deviating from VCC/2 when the power is turned off.
--17--
CXA2547Q
Example of Representative Characteristics
Tone control frequency response 20 16 12 8 +15
Voltage (dB)
4 0 -4 -8 -12 -16 -20 10 100 1k Frequency (Hz) 10k 100k -15
Loudness frequency response 10
0
VRC=0dB
Voltage (dB)
-10
VRC=-10dB VRC=-20dB
-20 VRC=-30dB
-30 VRC=-40dB
-40
1
10
100 Frequency (Hz)
1k
10k
100k
--18--
CXA2547Q
Package Outline
Unit : mm
48PIN QFP (PLASTIC)
15.3 0.4 + 0.4 12.0 - 0.1 + 0.1 0.15 - 0.05 0.15 36 25
37
24
48
13
+ 0.2 0.1 - 0.1
1 + 0.15 0.3 - 0.1
12
0.8
0.24
M
+ 0.35 2.2 - 0.15
PACKAGE STRUCTURE
PACKAGE MATERIAL SONY CODE EIAJ CODE JEDEC CODE QFP-48P-L04 QFP048-P-1212 LEAD TREATMENT LEAD MATERIAL PACKAGE MASS EPOXY RESIN SOLDER / PALLADIUM PLATING 42/COPPER ALLOY 0.7g
NOTE : PALLADIUM PLATING This product uses S-PdPPF (Sony Spec.-Palladium Pre-Plated Lead Frame).
--19--
0.9 0.2
13.5

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